Design and Implementation of SoC-based Image Codec IP Cores
DOI:
https://doi.org/10.62051/ijcsit.v3n2.38Keywords:
JPEG-LS, Image codec, IP core, SoCAbstract
With the rapid development of contemporary high technology, UAV has become an emerging remote sensing platform. The data generated by UAV remote sensing is growing explosively, and it is urgent to process UAV remote sensing images, in which lossless compression can reduce the amount of data and save storage and transmission costs. The main work of this paper is the design of SoC-based image coding and decoding IP cores, using the JPEG-LS algorithm as a benchmark for algorithmic improvement, and then based on the heterogeneous multi-core SoC of ARM+FPGA, taking full advantage of the parallel computing and low power consumption of FPGA and the powerful processing capability of ARM, exploring how to efficiently utilize the existing hardware resources, and designing the high-precision, high-speed, low-power consumption image coding and decoding IP cores for a variety of image processing fields such as UAV remote sensing image field.
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